Retention Cells
Simple Explanation (Gist)
Retention cells are specialized flip-flops or latches used in low-power ASIC designs to retain the state of a register during power-down modes, preventing data loss when a power domain is switched off.
Detailed Breakdown
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Purpose: In designs employing power gating, where certain blocks are powered down to save leakage power, retention cells ensure that critical data within these blocks is not lost. Instead of losing the state, the data is transferred to a retention register before power-down and restored upon power-up.
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Mechanism: A retention cell typically consists of a master-slave flip-flop and a small, always-on retention latch. When the main power supply to the flip-flop is cut off, the data is transferred to this retention latch, which is powered by an always-on (retention) power supply. When the main power is restored, the data is transferred back from the retention latch to the main flip-flop.
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Types: While the concept is generally applied to flip-flops, retention can also be implemented for latches. The key is the presence of a separate, always-on power domain for the retention element.
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Power Domains: Retention cells are crucial in multi-voltage and power-gated designs, where different parts of the chip operate at different voltages or can be independently powered on/off. They act as an interface between the main power domain and the always-on retention power domain.
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Design Considerations:
- Area Overhead: Retention cells are typically larger than standard flip-flops due to the additional retention latch and control logic.
- Timing: The save and restore operations introduce additional timing paths that must be carefully analyzed and constrained.
- Control Signals: Specific control signals (e.g.,
save,restore,power_good) are required to manage the data transfer to and from the retention latch. - Always-On Power: A dedicated, always-on power supply is necessary for the retention latches, which must be robust and stable.
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Application: Commonly used in mobile devices, IoT devices, and other battery-powered applications where minimizing power consumption during standby or idle modes is critical.