Common Power Format (CPF)

1. What is CPF?

Common Power Format (CPF) is a Tcl-based file format used in VLSI design to specify power-saving techniques and power intent early in the design process, ensuring consistent implementation across various design stages and tools. It allows designers to define power-saving strategies such as clock gating, multi-voltage logic, and power shut-off for inactive blocks. The format was initially developed by Cadence Design Systems and later contributed to the Si2 (Silicon Integration Initiative) where it was ratified as a standard.

2. Why is CPF important?

In modern VLSI designs, power consumption is a critical concern, especially for mobile and battery-powered devices. Before CPF, specifying low-power techniques was often manual, error-prone, and inconsistent across different Electronic Design Automation (EDA) tools, requiring the same information to be entered multiple times in various formats. CPF addresses this by providing a common, automated, and consistent way to specify power-specific data once, which can then be used by all tools throughout the design flow, from logic design to implementation and verification. This helps in detecting potential design problems related to power early in the design stages.

3. Key aspects/features of CPF

CPF allows for the expression of various low-power design elements:

• Power Domains and Supplies: Defines logical and physical power domains and their associated power supplies.
• Power Control Logic: Specifies the insertion and behavior of special cells required for low-power operation, including:
  • Level Shifters: Needed when signals cross between blocks operating at different supply voltages.
  • Isolation Logic: Used to hold signal values to a known state when coming from a powered-off domain to prevent corruption in active domains.
  • State-Retention Logic: Ensures that the state of a block is retained even when it is powered off.
  • Switch Logic: Controls how blocks are switched on and off.
• Power Modes: Defines different operational power states (e.g., standby, sleep) and their transitions.

4. How it’s used in the VLSI design flow

CPF is integrated into the entire VLSI design flow, from front-end to back-end:

• Early Design Stages: Power intent is captured at the RTL (Register Transfer Level) stage.
• Logic Synthesis: Tools use CPF to correctly insert level shifters and other power-aware components.
• Physical Implementation (Place and Route): Backend tools utilize CPF to guide the placement of power gating logic, isolation, and retention cells.
• Verification: CPF enables power-aware verification, allowing simulators to propagate unknown (‘X’) values from shut-off domains, mimicking real-life behavior and helping to verify dynamic power sequencing and isolation. This ensures that the design functions correctly under various power conditions.

5. CPF vs. UPF

While CPF is a significant standard, it has a counterpart known as Unified Power Format (UPF). UPF was proposed as an IEEE standard, primarily driven by companies like Synopsys and Mentor Graphics, whereas CPF was driven by Cadence and Si2. Although the technical differences between the two formats are relatively minor, they represent competing standards in the industry, with some EDA tools supporting one, both, or neither.

6. Conclusion

Common Power Format (CPF) is a crucial standard in VLSI design that enables the consistent and automated specification of power management strategies. By defining power intent early and uniformly, CPF streamlines the low-power design flow, from architectural definition to physical implementation and verification, ultimately leading to more power-efficient integrated circuits.

Further Reading

• Low Power Design Essentials by Jan Rabaey
• Unified Power Format (UPF) and Common Power Format (CPF) for Low Power Design by Subhasish Mitra
• Wikipedia - Common Power Format
• Design And Reuse - Common Power Format (CPF)
• EE Times - CPF vs. UPF