Bridging Faults
1. What are Bridging Faults?
Bridging Faults in VLSI (Very Large Scale Integration) circuits occur when two or more signal lines that should be isolated are unintentionally shorted together. This typically happens due to manufacturing imperfections, leading to erroneous circuit behavior.
2. Causes
These faults commonly arise from manufacturing defects, such as metal debris bridging adjacent wires, or can result from physical damage or degradation over time.
3. Types and Behavior
- AND Bridging: When two nets with different logic values are shorted, the resulting value behaves like a permanent logic 0 (AND operation).
- OR Bridging: If two nets with different logic values are shorted, the resulting value behaves like a permanent logic 1 (OR operation).
- Dominant Bridging: In this scenario, one of the shorted lines dictates the logic value, often when a high-impedance net is bridged with a low-impedance net.
- Feedback Bridging: A specific type where the short creates a feedback loop, potentially causing circuit oscillation or latching.
- Non-feedback Bridging: Involves shorts between output lines or input-output lines from different circuits without forming a feedback path.
4. Effects
Bridging Faults can lead to significant issues, including:
- Logical errors
- Incorrect outputs
- Complete circuit failure
- Variations in signal propagation delays, disrupting circuit synchronization
- Unintended current leakage or excessive power dissipation, which may lead to thermal problems
- In some cases, they can even transform a combinational circuit into a sequential one.
5. Detection Challenges
Detecting Bridging Faults is often more complex than detecting other fault types, such as stuck-at faults, and requires more sophisticated test patterns and modeling techniques.
6. Conclusion
Bridging Faults are critical defects in VLSI circuits that can severely compromise functionality and reliability. Their diverse manifestations and impacts necessitate specialized testing and modeling approaches to ensure the proper operation of integrated circuits.
Further Reading
- VLSI Test Principles and Architectures: Design for Testability by Laung-Terng Wang, Cheng-Wen Wu, and Xiaoqing Wen
- Digital System Test and Testable Design by Zainalabedin Navabi
- ChipEdge - Bridging Faults in VLSI: A Brief Guide
- Cadence - Bridging Faults